The present invention relates generally to improved polishing pads used to polish and/or planarize substrates, particularly metal or metal-containing substrates during the manufacture of a semiconductor device. Specifically, this invention relates to pads manufactured with an optimized combination of physical properties and a grooved surface engineered to a specific design to provide improved polishing performance.
Chemical-mechanical planarization (xe2x80x9cCMPxe2x80x9d) is a process currently practiced in the semiconductor industry for the production of flat surfaces on integrated circuits devices. This process is discussed in (xe2x80x9cChemical Mechanical Planarization of Microelectronic Materialsxe2x80x9d, J. M. Steigerwald, S. P. Murarka, R. J. Gutman, Wiley, 1997, which is hereby incorporated by reference in its entirety for all useful purposes. Broadly speaking, CMP involves flowing or otherwise placing a polishing slurry or fluid between an integrated circuit device precursor and a polishing pad, and moving the pad and device relative to one another while biasing the device and pad together. Such polishing is often used to planarize: i. insulating layers, such as silicon oxide; and/or ii. metal layers, such as tungsten, aluminum, or copper.
As semiconductor devices become increasingly complex (requiring finer feature geometries and greater numbers of metallization layers), CMP must generally meet more demanding performance standards. A relatively recent CMP process has been the fabrication of metal interconnects by the metal damascene process (see for example, S. P. Murarka, J. Steigerwald, and R. J. Gutmann, xe2x80x9cInlaid Copper Multilevel Interconnections Using Planarization by Chemical Mechanical Polishingxe2x80x9d, MRS Bulletin, pp. 46-51, June 1993, which is hereby incorporated by reference in its entirety for all useful purposes).
With damascene-type polishing, the polished substrate is generally a composite rather than a homogenous layer and generally comprises the following basic steps: i. a series of metal conductor areas (plugs and lines) are photolithographically defined on an insulator surface; ii. the exposed insulator surface is then etched away to a desired depth; iii. after removal of the photoresist, adhesion layers and diffusion barrier layers are applied; iv. thereafter, a thick layer of conductive metal is deposited, extending above the surface of the insulator material of the plugs and lines; and v. the metal surface is then polished down to the underlying insulator surface to thereby produce discrete conductive plugs and lines separated by insulator material.
In the ideal case after polishing, the conductive plugs and lines are perfectly planar and are of equal cross-sectional thickness in all cases. In practice, significant differences in thickness across the width of the metal structure can occur, with the center of the feature often having less thickness than the edges. This effect, commonly referred to as xe2x80x9cdishingxe2x80x9d, is generally undesirable as the variation in cross-sectional area of the conductive structures can lead to variations in electrical resistance. Dishing arises because the harder insulating layer (surrounding the softer metal conductor features) polishes at a slower rate than the metal features. Therefore, as the insulating region is polished flat, the polishing pad tends to erode away conductor material, predominantly from the center of the metal feature, which in turn can harm the performance of the final semiconductor device.
Grooves are typically added to polishing pads used for CMP for several reasons:
1. To prevent hydroplaning of the wafer being polished across the surface of the polishing pad. If the pad is either ungrooved or unperforated, a continuous layer of polishing fluid can exist between the wafer and pad, preventing uniform intimate contact and significantly reducing removal rate.
2. To ensure that slurry is uniformly distributed across the pad surface and that sufficient slurry reaches the center of the wafer. This is especially important when polishing reactive metals such as copper, in which the chemical component of polishing is as critical as the mechanical. Uniform slurry distribution across the wafer is required to achieve the same polishing rate at the center and edge of the wafer. However, the thickness of the slurry layer should not be so great as to prevent direct pad-wafer contact.
3. To control both the overall and localized stiffness of the polishing pad. This controls polishing uniformity across the wafer surface and also the ability of the pad to level features of different heights to give a highly planar surface.
4. To act as channels for the removal of polishing debris from the pad surface. A build-up of debris increases the likelihood of scratches and other defects.
The xe2x80x9cGroove Stiffness Quotientxe2x80x9d (xe2x80x9cGSQxe2x80x9d) estimates the effects of grooving on pad stiffness and is hereby defined as Groove Depth (D)/Pad Thickness (T). Hence, if no grooves are present, the GSQ is zero, and at the other extreme (if the grooves go all the way through the pad) the GSQ is unity. The xe2x80x9cGroove Flow Quotientxe2x80x9d (xe2x80x9cGFQxe2x80x9d) estimates the effects of grooving on (pad interface) fluid flow and is hereby defined as Groove Cross-Sectional Area (Ga)/Pitch Cross-Sectional Area (Pa), where Ga=Dxc3x97W, Pa=Dxc3x97P, P=L+W; D being the groove depth, W being the groove width, L being the width of the land area, and P being the pitch. Since D is a constant for a particular groove design, the GFQ may also be expressed as the ratio of groove width to pitch Groove Width (W)/Groove Pitch (P).
The present invention is directed to (i) polishing pads for CMP having low elastic recovery during polishing, while also exhibiting significant anelastic properties relative to many known polishing pads; and (ii) polishing pads with defined groove patterns having specific relationships between groove depth and overall pad thickness and groove area and land area. In some embodiments, the pads of the present invention further define: i. an average surface roughness of about 1 to about 9 micrometers; ii. a hardness of about 40 to about 70 Shore D; and iii. a tensile Modulus up to about 2000 MPa at 40xc2x0 C. In one embodiment, the polishing pads of the present invention define a ratio of Elastic Storage Modulus (Exe2x80x2) at 30 and 90xc2x0 C. being 5 or less, preferably less than about 4.6 and more preferably less than about 3.6. In other embodiments of the present invention, the polishing pad defines a ratio of Exe2x80x2 at 30xc2x0 C. and 90xc2x0 C. from about 1.0 to about 5.0 and an Energy Loss Factor (KEL) from about 100 to about 1000 (1/Pa) (40xc2x0 C.). In other embodiments, the polishing pad has an average surface roughness of about 2 to about 7 micrometers, a hardness of about 45 to about 65 Shore D, a Modulus Exe2x80x2 of about 150 to about 1500 MPa at 40xc2x0 C., a KEL of about 125 to about 850 (1/Pa at 30xc2x0 C.) and a ratio of Exe2x80x2 at 30xc2x0 C. and 90xc2x0 C. of about 1.0 to about 4.0. In yet other embodiments, the polishing pads of the present invention have an average surface roughness of about 3 to about 5 micrometers, a hardness of about 55 to about 63 Shore D, a Modulus Exe2x80x2 of 200 to 800 MPa at 40xc2x0 C., KEL of 150 to 400 (1/Pa at 40xc2x0 C.) and a ratio of Exe2x80x2 at 30xc2x0 C. and 90xc2x0 C. of 1.0 to 3.6.
In another embodiment, the present invention is directed to polishing padshaving a groove pattern with a groove depth in a range of about 75 to about 2,540 micrometers (more preferably about 375 to about 1,270 micrometers, and most preferably about 635 to about 890 micrometers), a groove width in a range of about 125 to about 1,270 micrometers (more preferably about 250 to about 760 micrometers, and most preferably about 375 to about 635 micrometers) and a groove pitch in a range of about 500 to about 3,600 micrometers (more preferably about 760 to about 2,280 micrometers, and most preferably about 2,000 to about 2,260 micrometers). A pattern with this configuration of grooves further provides a Groove Stiffness Quotient (xe2x80x9cGSQxe2x80x9d) in a range of from about 0.03 (more preferably about 0.1, and most preferably about 0.2) to about 1.0 (more preferably about 0.7, and most preferably about 0.4) and a Groove Flow Quotient (xe2x80x9cGFQxe2x80x9d) in a range of from about 0.03 (more preferably about 0.1, and most preferably about 0.2) to about 0.9 (more preferably about 0.4, and most preferably about 0.3).
In yet another embodiment, the pads of the present invention may be filled or unfilled and porous or non-porous. Preferred fillers include, but are not limited to, micro-elements (e.g., micro-balloons), abrasive particles, gases, fluids, and any fillers commonly used in polymer chemistry, provided they do not unduly interfere negatively with polishing performance. Preferred abrasive particles include, but are not limited to, alumina, ceria, silica, titania, germania, diamond, silicon carbide or mixtures thereof, either alone or interspersed in a friable matrix which is separate from the continuous phase of pad material.
The pads of this invention can be used in combination with polishing fluids to perform CMP upon any one of a number of substrates, such as, semiconductor device (or precursor thereto), a silicon wafer, a glass (or nickel) memory disk or the like. More detail may be found in U.S. Pat. No. 5,578,362 to Reinhardt et al. which is incorporated in its entirety for all useful purposes. The pad formulation may be modified to optimize pad properties for specific types of polishing. For example, for polishing softer metals, such as aluminum or copper, softer pads are sometimes required to prevent scratches and other defects during polishing. However, if the pads are too soft, the pad can exhibit a decreased ability to planarize and minimize dishing of features. For polishing oxide and harder metals such as tungsten, harder pads are generally required to achieve acceptable removal rates.
In yet another embodiment, the present invention is directed to a process for polishing metal. damascene structures on a semiconductor wafer by: i. pressing the wafer against the surface of a pad in combination with an aqueous-based liquid that optionally contains sub-micron particles; and ii. providing mechanical or similar-type movement for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer.
The preferred pads of the present invention are characterized by high-energy dissipation, particularly during compression, coupled with high pad stiffness. Preferably, the pad exhibits a stable morphology that can be reproduced easily and consistently. Furthermore, the pad surface has macro-texture. This macro-texture can be either perforations through the pad thickness or surface groove designs. Such surface groove designs include, but are not limited to, circular grooves which may be concentric or spiral grooves, cross-hatched patterns arranged as an X-Y grid across the pad surface, other regular designs such as hexagons, triangles and tire-tread type patterns, or irregular designs such as fractal patterns, or combinations thereof. The groove profile may be rectangular with straight side-walls or the groove cross-section may be xe2x80x9cVxe2x80x9d-shaped, xe2x80x9cUxe2x80x9d-shaped, triangular, saw-tooth, etc. Further, the geometric center of circular designs may coincide with the geometric center of the pad or may be offset. Also the groove design may change across the pad surface. The choice of design depends on the material being polished and the type of polisher, since different polishers use different size and shape pads (i.e. circular versus belt). Groove designs may be engineered for specific applications. Typically, these groove designs comprise one or more grooves. Further, groove dimensions in a specific design may be varied across the pad surface to produce regions of different groove densities either to enhance slurry flow or pad stiffness or both. The optimum macro-texture design will depend on the material being polished (i.e. oxide or metal, copper or Tungsten) and the type of polisher (e.g. IPEC 676, AMAT Mirra, Westech 472, or other commercially available polishing tools).